The present invention generally relates to multi-layer conductor-dielectric oxide foils suitable for making capacitors that are integrated or embedded in circuit boards.
In the electronics art, smaller often means better. In the quest to provide smaller electronic appliances, the electronics industry seeks electronic components that are smaller than predecessor components.
The capacitor (a dielectric material sandwiched between two conductors) represents one electronic component that has substantially shrunk in this quest. However, current practice relies on individually mounting and soldering each capacitor onto the surface of circuit boards. Despite the advances in capacitor miniaturization, each surface mounted capacitor still occupies a significant fraction of the circuit board surface area, and requires substantial cost to “pick and place” onto the board. For example, a typical cellular phone contains over 200 surface mounted capacitors connected to circuit boards by over 400 solder joints. The ability to integrate or embed capacitors in circuit boards during manufacture of the circuit boards would provide substantial space and cost savings over surface mounted capacitors. Unfortunately, efforts to make capacitors that can be integrated or embedded into circuit boards have produced capacitors that do not have sufficient capacitance (e.g. <10 pF/mm2) to replace many of the capacitors (e.g., requiring >100 pF capacitance) on a circuit board.
Printed circuit boards typically comprise multiple layers of copper and glass-reinforced epoxy or other polymer. The copper is patterned to form the conducting elements of the circuit, and the polymer provides dielectric isolation and mechanical robustness. Polymers are low dielectric constant materials, and therefore parallel plate embedded capacitors formed within the polymer dielectric circuit board do not offer high capacitance density.
Although ceramic dielectrics that have very high dielectric constants are available, they are typically too rigid to be mechanically compatible with organic printed circuit boards. Further, organic printed circuit boards are incompatible with the methods used to form the ceramic dielectric films. Ceramic dielectric films are commonly formed by a broad range of deposition techniques, such as chemical solution deposition (CSD), evaporation, sputtering, physical vapor deposition and chemical vapor deposition. However, in order to achieve the requisite dielectric structure, each technique typically requires either a high-temperature deposition or a high-temperature anneal. Such temperatures would melt, ignite or otherwise degrade the organic materials in the circuit board substrate.
Furthermore, these processes are incompatible with copper in two ways. First, at the high temperatures and oxidizing conditions needed to form the ceramic dielectric, copper forms a thin layer of copper oxide at the interface between the ceramic dielectric and the copper. This effectively forms an interface layer which will degrade the overall device performance, thus negating any advantage gained by the use of the ceramic dielectric. Second, the reducing atmosphere favored by copper produces excessive defect concentrations and may frustrate phase formation in the dielectric oxide layer. Efforts to form ceramic films at temperatures that are compatible with circuit board components have generally compromised the dielectric properties of the resulting ceramic. For ceramic dielectrics, it is apparent that favorable dielectric properties are intimately linked to a complex crystal structure (i.e., perovskite) that is difficult to develop at lower temperatures.
Dielectric oxides such as lead zirconate titanate (PZT) and lead lanthanum zirconate titanate (PLZT) belong to a particularly promising class of high permittivity ceramic dielectrics with the perovskite crystal structure. When formed by the CSD process, dielectric oxides can be made into very thin, flexible, robust layers with very high dielectric constants.
It has been proposed that dielectric oxides such as PZT and PLZT can be formed on a free-standing metal foil, then incorporated into the circuit board. However, as discussed above, prior efforts to do so on less expensive metals such as copper were frustrated by the incompatibility of copper with the temperature required to form the requisite dielectric structure. Currently, such dielectric oxides are formed by depositing a solution of dielectric oxide starting material on a film of a noble metal, such as platinum. In turn, the noble metal film rests on a silicon or ceramic substrate that is very smooth and can withstand high processing temperatures (about 400 to about 800° C.). The solution is heated to remove the solvent. This leaves a dielectric oxide starting material residue, which is then sintered to form a thin dielectric oxide layer on the noble metal film. Thereafter, another conductor layer is disposed on the opposing, exposed surface of the dielectric oxide layer to form a capacitor. However, it is apparent that noble metals cost too much to compete with copper as the principal conductor in printed circuit boards.
The present invention overcomes the incompatibility of the polymer with high-temperature processes by forming the dielectric oxide film on a metal foil before attaching the foil to a circuit board substrate. In this way, the circuit board polymer is not exposed to the high processing temperatures required to form a high permittivity dielectric oxide film. Moreover, the present invention provides a way to use a less expensive metal such as copper as the base metal.